1. Field of the Invention
The present invention relates to a nondestructive readout nonvolatile memory using a ferroelectric thin film.
2. Description of the Related Art
In general, a ferroelectric substance for forming a ferroelectric thin film has a great piezoelectric effect, pyroelectric effect, electrooptic effect, acoustooptic effect, and nonlinear optic effect and is used for a nonvolatile memory, a sensor, a transducer, an actuator, an active optical element, a communication element, and the like.
One polarization characteristic of the ferroelectric substance is a hysteresis characteristic as shown in FIG. 11, and a ferroelectric memory using this characteristic is known. As shown in FIG. 11, when a voltage V is applied to the ferroelectric substance and then the ferroelectric substance is polarized, the residual polarization -P.sub.T or P.sub.T is maintained at point A or C even if the voltage is returned to "0". A digital signal "1" or "0" is applied to the residual polarization -P.sub.T or P.sub.T to serve the ferroelectric substance as a recording medium.
When information is recorded using the above polarization characteristic, a voltage Vs (saturation voltage), which is considerably higher than a resistant voltage Vc, is applied to the ferroelectric substance, and the signal "0" or "1" is recorded thereon.
If a positive readout pulse V.sub.A is applied to the ferroelectric substance in the recording state of "1", the polarization state changes from points A to C, and charges corresponding to a difference 2P.sub.T between the polarizations at points A and C are removed. If the pulse Va is applied thereto in the recording state of "0", the polarization state changes from point C to point B and returns to point C, and a difference between the polarizations at points C and B is "0". Consequently, the recording state of "1" or "0" can be read out by detecting a number of charges generated when the pulse is applied.
FIG. 12A is a cross-sectional view of a conventional typical ferroelectric memory cell having an active matrix structure, and FIG. 12B is a circuit diagram which is equivalent to the memory cell.
The ferroelectric memory cell writes information to a ferroelectric capacitor 2 or reads out information from the capacitor when a MOS transistor 1 is turned on. The MOS transistor 1 includes an n.sup.+ -type source region 3, an n.sup.+ -type drain region 4, and a gate region. The ferroelectric capacitor 2 connected to the n.sup.+ -type source region 3 of the MOS transistor 1 by aluminum wiring, includes a lower electrode 6 of Pt/Ti, a ferroelectric thin film 7 such as a PZT (lead zirconate titanate) film which is formed on the lower electrode 6 by using, for example, the solgelspinon coating technique and the MOCVD (Metal Organic Chemical vapor Deposition) technique, and an upper electrode 8 of Pt formed on the thin film 7.
A conventional ferroelectric memory includes a large number of ferroelectric memory cells arrayed in matrix, as shown in FIG. 13A, and was used as a memory cell array having a simple matrix structure. FIG. 13C is a circuit diagram which is equivalent to a 3.times.3 memory cell array having a simple matrix structure.
In the ferroelectric memory cell array shown in FIG. 13A, a pair of striped lower electrodes 6 and a pair of striped upper electrodes 8 are formed on, each of both surfaces of a substrate serving as a supporting body so as to cross each other. The ferroelectric thin film 7 is formed between the lower and upper electrodes 6 and 8. One memory cell is formed at each crossing point of the lower and upper striped electrodes 6 and 8. The ferroelectric memory described above is a so-called simple matrix type memory in which a desired memory cell is selected by applying a voltage V to the striped electrodes 6 and 8 and information is written to/read out from the selected memory cell.
When voltages 1/2 V and -1/2 V are applied to terminals A and B shown in FIGS. 13B and 13C, respectively, a voltage V appears across a memory cell C.sub.32. When a storage state of the cell C.sub.32 is read out, voltage 2/5 V appears across memory cells C.sub.12, C.sub.21, C.sub.22 and C.sub.33, and voltage 1/5 V appears across memory cells C.sub.11, C.sub.13, C.sub.23 and C.sub.31.
In the case of an n.times.n memory cell array, voltage (n-1)/(2n-1).times.V is applied to memory cells involved in a striped line to which voltages 1/2 V and -1/2 V are applied, and voltage 1/(2n-1).times.V is applied to the other nonselective memory cells.
Even though an application voltage V is set so as not to invert the polarization of the ferroelectric memory cells, in other words, even though the voltage V is set not higher than a resistant voltage, the ferroelectric memory cells are depolarized so that the polarization state changes from points A to B' and then changes from points B' to A' after an electric characteristic is eliminated from the ferroelectric memory cell, as indicated by the dotted line in FIG. 11. This depolarization is remarkably typical of the ferroelectric substance. It is thus impossible to prevent the nonselective memory cells from being depolarized in the conventional ferroelectric memory having a simple matrix structure as shown in FIGS. 13A to 13C.
A memory having nonselective memory cells the storage states of which are not destroyed when a write or readout voltage V is applied to selected memory cells, is generally called a nondestructive ferroelectric memory. To achieve the nondestructive ferroelectric memory, a first method in which no voltage is substantially applied to a ferroelectric thin film using the nonlinear characteristic of antiferroelectrics, and a second method in which a thin-film structure having a metal-insulator-metal (MIM) function is used, are proposed. The first method is disclosed in Published Unexamined Japanese Patent Application No. 3-108192, and the second method is disclosed in Published Unexamined Japanese Patent Application No. 3-108769.
If the first method is applied to the conventional ferroelectric memory, a voltage applied to the nonselective memory cells is decreased, but the permittivity is still high, and the voltage applied to the nonselective memory cells is not so low as to prevent the cells from being depolarized completely.
If the second method is applied, a drawback is confirmed in which the operation time of an MIM switch is too long. The above two publications describe a basic structure of a memory for achieving the respective methods, but describe neither a specific structure of the memory nor a method of manufacturing the memory.